1. Field of the Invention
The present invention relates to an ink jet recording apparatus. More particularly, the invention relates to a control circuit for controlling the power supply on and off of an ink jet recording apparatus with the energy saving mode that uses the stop function of clock signal of a microprocessor and an NMI interrupt. The invention also relates to a method for controlling such recording apparatus.
2. Related Background Art
In recent years, there have been developed various portable personal computers of notebook type or laptop type, which are easily portable, and operative by a battery as well. Also, besides computer equipment, many kinds of low-power consumption equipment have been developed. For the equipment of such kind, various devices have been designed to save electric power in order to make the driving time as long as possible for a battery used or to suppress the power dissipation during the standby period.
For example, to make the power consumption for a CPU smaller, it is devised to slow down the operational speed of the CPU for reducing the current consumed by the CPU. Now that the CPU current consumption is almost proportional to the frequency of input clock signal, the frequency of the input signal is reduced to perform a low-frequency operation or if the clock signal completely stops, the current consumption is reduced. As a result, it becomes possible to reduce the power consumption. Fundamentally, the STOP clock function (hereinafter referred to as the STOP mode) possessed by a CPU is used for the implementation thereof. Besides this, the operation of a CPU is suspended temporarily (hereinafter referred to the HALT mode) so as to reduce dynamic current consumption for the reduction of the power consumption. However, it is impossible to operate the clock signal of a CPU at a low frequency or to reduce the current consumption more than the STOP mode in which the clock signal stops completely.
FIG. 5 is a view that shows the transmitting status of a CPU. Now, in conjunction with FIG. 5, a description will be made of the significant difference between the HALT mode and the STOP mode in terms of the power consumption.
At first, the HALT mode 52 is the one in which the operational clock signal of a CPU stops. However, the supply of clock signal to the incorporated peripheral circuits other than the CPU is continued for the consecutive operation. Therefore, although the total power consumption of the system can be reduced, it is impossible to reduce the current consumption of the incorporated peripheral circuits.
Here, the operation of the CPU itself is at rest, thus making the current consumption smaller than that of the normal mode 51.
On the other hand, the STOP mode 50 is such as to stop the clock generator together with the operational clock signal of the CPU, hence suspending the CPU entirely. As a result, the core circuit of the CPU and the operation of the incorporated peripheral circuits come to a stop, respectively. Under such circumstances, the STOP mode 50 results in the consumption of the static current consumption only, and if the C-MOS process is adopted for the manufacturing process of a CPU, it becomes possible to reduce the power consumption still more.
As described above, there is a significant difference between the HALT mode 52 and the STOP mode 50 in terms of the current consumption. Therefore, when a low-power consumption computer system is developed, the STOP mode 50 is utilized more often at present.
Generally, for switching to the HALT mode 52 and the STOP mode 50, the shift from, the normal mode 51 to the STOP mode 50 or to the HALT mode 52 is effected by means of a software control. For example, as indicated by the status shift shown in FIG. 5, the shift is made to the HALT mode 52 by the execution of the HALT command, and the shift to the STOP mode 50 by means of the mode setting to the CPU inner register for use of the STOP mode setting.
When shifting to the HALT mode 52 or the STOP mode 50 once, the supply of clock signal partly or totally stops. Therefore, only with the reset signal or interrupt signal from the external circuit, the normal operation mode 51 can be restored.
Conventionally, for the computer control equipment that controls the power supply by means of software (programming), there is a need for the CPU to operate at all times in order to control the power supply, and even in a state of the power supply being cut off, the CPU and the peripheral circuits are in operation. As a result, it is impossible to lessen the power consumption. Recently, therefore, with the utilization of a CPU having the aforesaid STOP mode 50, there has been designed a method for reducing the power consumption in a state of the power supply being cut off by means of the STOP mode 50.
Nevertheless, in order to restore the normal mode 51 from the STOP mode 50, there is no alternative but to use the NMI signal (Non Maskable Interrupt) and a reset signal for such restoration as shown in FIG. 5. To adopt such method, it is devised, as shown in FIG. 6, to utilize the signal from the power supply switch as the trigger signal for such restoration.
In FIG. 6, a reference numeral 61 designates the power switch to issue the power supply ON/OFF command; 62, a resistor; and 63, a capacitor that forms an RC filter in cooperation with the resistor 62 to eliminate noise signals from the power switch 61. The output signal from the RC filter forms an NMI signal 64 that disables the mask for the CPU 65. Also, a reference numeral 66 designates the power supply circuit that supplies the power output to all the necessary systems; and 67, a sub-power supply circuit that supplies the minimum power when the CPU is in the STOP mode. In this case, power is supplied only to the CPU.
In a case of such conventional example, an inexpensive switch of mechanical contact type is used in general. The switch of mechanical contact type is such as to condition the contact point in contact while it is depressed. Structurally, therefore, an instantaneous bouncing of the contacts tends to occur when the contacts are connected or cut off. Then, even for one-time depression of the power switch 61, the so-called chattering takes place electrically as if depressed several times when the power switch contact is ON at 70 or the power switch contact is OFF at 71 for the power switch 61 as shown in FIG. 7. As a result, noise signals occur in the NMI signal 64.
Now, it is assumed that the NMI signal 64 of the CPU 65 rises to actuate the interrupt at the edge timing, and the NMI is actuated several times eventually by one-time depression of the power switch 61 on standby in the STOP mode 50 as shown in FIG. 7. Also, at the time of the power switch contact being OFF at 71, the same chattering occurs. In other words, for the NMI signal 64, the interrupt process of NMI1 at 72, NMI2 at 73, NMI3 at 74, NMI4 at 75, NMI5 at 76, NMI6 at 77, NMI7 at 78, and NMI8 at 79 is executed continuously. In this case, there is no alternative for the CPU 64 but to execute the process of NMI signal 65, which is the interrupt process of the highest priority to disable the interrupt prohibition process by use of software. Therefore, during the restoration process from the STOP mode 50 with the first NMI1 at 72 being triggered, the next request of the same process is further made unexpectedly for the NMI2 at 73 to the NMI8 at 79. Then, depending on the cases, the CPU 65 runs away or the control system is put out of order eventually. Furthermore, there is encountered a problem that if the continuous NMI (at 72 to 79) interrupt should take place while an actuator is initialized for restoration by use of a control system or the like that utilizes an actuator, such as a motor, the initialization of the actuator is suspended eventually, among some other problems.
In order to prevent such situations, a resistor 62, a capacitor 63, and other elements are used to form the RC filter or the like, which is inserted into the NMI signal 64, but it is difficult to adjust the time constant of the RC filter in accordance with noises in various cases. Also, if the behavior of noise generation from the mechanical contacts is not necessarily uniform, it is difficult to effectuate the complete elimination thereof.
Also, since the switch is of mechanical contact type, it can be depressed at any time whenever the user intends to do so, and even if the aforesaid chattering problem is solved by use of the RC filter, the situation still remains the same as the occurrence of chattering if the user depresses the power switch in succession in a short period of time.
Also, in the specification of Japanese Patent Application Laid-Open No. 08-44453, a method for suspending the system clock signal of a CPU is disclosed as a method for lessening the power consumption for an apparatus. In the case of this method, it is necessary for the CPU to release the gate circuit of interrupt prohibition in order to generate the NMI that is the trigger signal for suspending the clock signal of the CPU. Also, there is a need for the provision of the delayed time required for securing the execution time of software. Therefore, if the NMI signal is generated by use of the power switch key, for example, which is asynchronous to the CPU operation, for the execution of the power control, there is a problem encountered that the gate circuit cannot be released, hence making it impossible to generate the NMI signal eventually.
As described above, for the control of an ink jet recording apparatus (printer) that utilizes the STOP mode function of the CPU in order to reduce the power consumption, there occur many interrupts of the highest priority that disable masking due to chattering noises generated by switching if the power switch is used for triggering for restoration from the STOP mode. Then, the multiple nesting of the interrupt process of the highest priority occurs inevitably. As a result, the restoration process is caused to run away or the initialization of actuator is disabled to terminate normally in the system or the like for which the actuator is provided, among some other malfunctions that may ensue. Fundamentally, it is anticipated to generate one NMI signal per each depression of the power switch, but in case of an inexpensive contact type switch, chattering is a problem that cannot be avoided, and at the same time, there is a possibility that the user depresses the mechanical switch unexpectedly.
Since there is no means for avoiding this situation, there is such a problem as to execute the restoring process again while the system is being restored to normal mode from the STOP mode or depending on the cases, the power switch interrupt executes the processing sequence of the power OFF during the restoration process, because of the software control of the power ON/OFF. As a result, the power supply of the system is cut off despite the user turning ON the power supply. Thus, the problem is encountered here that the system shifts to the STOP mode again after all.